Embodiments of the present invention relate to a method for manufacturing a semiconductor device, and more particularly to a method for forming a semiconductor device including a storage node.
In general, a Dynamic Random Access Memory (DRAM) cell includes a capacitor for storing charges indicating information to be stored and a transistor for addressing the charges stored in the capacitor. Typically, a transistor formed over a semiconductor substrate includes a gate electrode for removing a current flowing in a source/drain region. Charges stored in the capacitor can be accessed through the transistor.
Storage capacity of the charges stored in the capacitor is called capacitance. As capacitance increases, a larger amount of information can be stored in the capacitor.
The capacitance can be represented by the following equation (1).C=εA/D  (1)
In this case, ‘ε’ is permittivity (or the dielectric constant) determined by a type of a dielectric film disposed between two electrodes, ‘d’ is a distance from one electrode to the other electrode, and ‘A’ is an effective surface area of the two electrodes. As can be seen from Equation (1), as permittivity (ε) of the dielectric film is increased and the distance (d) between two electrodes is reduced, a surface area (A) of the two electrodes is increased such that capacitance of the capacitor can also be increased.
In this case, ‘ε’ is permittivity (or the dielectric constant), A is an effective surface area of an electrode, and ‘d’ is a distance from one electrode to the other electrode. Therefore, in order to increase capacitance of the capacitor, the surface area of each electrode can be increased, thickness of a dielectric thin film can be reduced, or permittivity of the dielectric thin film can be increased. In order to increase the effective area of the electrode, the electrode structure of the capacitor is modified into a three-dimensional (3D) structure, for example, a concave structure, a cylindrical structure, etc.
In order to form the concave capacitor, a hole, in which a capacitor electrode is to be formed, is formed in an interlayer insulation film, a lower electrode of the capacitor is formed on an inner surface of the hole, and a dielectric film and an upper electrode are deposited over the lower electrode, such that the concave capacitor can be formed. As the semiconductor device is highly integrated, it is difficult for the concave capacitor to guarantee sufficient capacitance required for each cell within a limited cell region. Therefore, a cylindrical capacitor capable of providing a surface area larger than that of the concave capacitor has recently been proposed.
In order to form the cylindrical capacitor, a hole, in which a capacitor electrode is to be formed, is formed in an interlayer insulation film, and a lower electrode of the capacitor is formed in the hole, the interlayer insulation film is removed, and a dielectric film and an upper electrode are deposited over the remaining lower electrode, such that the cylindrical capacitor can be formed. The cylindrical capacitor may use both of the inside and outside of the lower electrode as an effective surface area of the capacitor, such that it has higher capacitance than the concave capacitor.
A dip-out process is may be used for the formation of the cylindrical capacitor.
However, the dip-out process is carried out by a wet process including a chemical solution. The chemical solution may unavoidably generate slanting or leaning of the storage-node lower electrode. Specifically, if there is a high aspect ratio of the storage-node lower electrode due to higher integration of the semiconductor device, slanting and leaning of the lower electrode are considered to be serious problems. In recent times, in order to overcome the above-mentioned problems, a nitride film support layer between lower electrodes has been used.
However, since various kinds of materials are formed in the vicinity of the nitride film support layer, a crack occurs in the nitride film support layer due to unbalanced stress between different materials. Due to such crack, defective products continuously occur upon completion of a package fabrication, resulting in reduction in product quality.